Total MIPI Solutions

Arasan is the industry’s leading provider of IP for the MIPI Standards starting with it’s active participation as a Contributor to the MIPI Association in 2004 followed by the launch of the Industry First MIPI IP’s – the CSI, DSI and D-PHY IP Cores. With over 10 years of MIPI experience, Arasan has the broadest library and foundry history.

The explosive growth of the Mobile Semiconductor Market over the past decade along with the broad adoption of its MIPI IP by Industry Leaders including most MIPI Association Founding Members, has made MIPI Arasan’s most successful product line yet, with over a billion chips shipped!

Camera Interface

The most current revision of the Camera Serial Interface standard is CSI-2 V1.3. The solution consists of a digital controller on the camera device IC (the MIPI CSI-2 Transmitter) and a digital controller on the application or image processor IC (the MIPI CSI-2 Receiver). The controllers connect across a physical layer. There are two physical layer configurations available

      1 to N MIPI D-PHY lanes plus 1 clock lane. Each lane is a high-speed differential pair. The MIPI D-PHY v1.1 operates at 1.5Gbps. A 4 lane D-PHY layer can transmit 4K video at 30fps.
      1 to N MIPI C-PHY lanes. Each “lane” is a 3 wire single-ended configuration that encodes video data into 3 bits symbols with the clock embedded. A 3 lane C-PHY v1.0 can transmit 4K video at 60fps.

Arasan offers the both controllers in Verilog RTL, the MIPI D-PHY, and MIPI C-PHY are provided as analog GDSII deliverables. Arasan also provides the industry’s only combination DPHY+CPHY which allows a processor manufacturer to provide compatibility for the full range of Camera device solutions. The MIPI D-PHY IP is Silicon Proven in over 18 Foundry Process Nodes from 180nm to 28nm across TSMC, Global Foundries, SMIC and UMC.

Display Interface

The most current revision of the Display Serial Interface standard is DSI V1.3. The solution consists of a digital controller on the display device IC (the MIPI DSI Device) and a digital controller on the application or processor IC (the MIPI DSI Host). Like the CSI-2 configuration, The controllers connect across a physical layer comprised of 1 to N MIPI D-PHY lanes plus 1 clock lane. Each lane is a high-speed differential pair. In addition a low-speed I2C serial link is used for camera control. For example a 2 lane D-PHY physical layer would have 8 data pins.
Arasan offers the both controllers in Verilog RTL and the MIPI D-PHY as a GDSII deliverable.

We also have over a decade of expertise implementing MIPI in semiconductors for a wide range of applications from the earliest Smartphones & Tablets, High Resolution Stereo Cameras for 3D using MIPI CSI for groundbreaking Gaming Consoles and 4K Displays using MIPI DSI to today’s automobiles & drones that require operation at extreme temperatures with military grade reliability to IoT’s that need to be optimized for ultra low power consumption, our engineers are steeped with knowledge on the MIPI Standards.
License MIPI with Confidence from Arasan Knowing our MIPI compliant IP products are backed by our engineering team with a treasure trove of knowledge to enable you get the best out of MIPI.

Our MIPI Interface IP Portfolio Includes

  • Display: MIPI DSI  Tx
  • Rx Controller
  • Camera: MIPI CSI Tx
  • Rx Controllers
  • DPHY Analog IP for CSI and DSI
  • CPHY Analog IP for CSI
  • Combination CPHY+DPHY Analog IP for CSI
  • Audio: Slimbus  Tx & Rx, Soundwire Tx & Rx
  • Radio: RFFE
  • Chip to Chip Interfaces:
    • UNIPRO Master and Slave
    • MPHY Analog IP for UFS, LLI, CSI-3, and SSIC
    • HSI
    • LLI

Roadmap

CSI-2 v1.2 with an 8 lane DPHY v1.0 supports 4K video at 30fps. CSI-2 v1.3 with a 3 lane C-PHY V1.0 supports 4K video at 60fps. DPHY revision 2.0 expected in 2016, will increase performance to 4.5Gbps allowing 4K60fps with only 2 lanes.

DSI v1.3 only works with the DPHY interface. The latest release added compression/decompression from VESA and unlimited D-PHY lane support. This combination can support video rates beyond 4K60fps. A new Display Serial Interface is in definition (DSI-2) which will add support for the C-PHY and higher performance D-PHYs.

M-PHY V3.1 Gear 3 has 5.9Gbps performance. The next revision Gear 4 pushes that ~12Gbps. Stay tuned for updates on Arasan’s support for M-PHY V4.0 with Gear 4.