CF+ / xD Host Controller IP
External memory are increasing at an exponential rate. At the system level, memory interfaces with larger capacities, smaller form factor and faster access times in addition to support for multiple industry standards are needed. Arasan Chip System’s CF+ / xD IP is a highly integrated host controller IP solution that supports two key memory and I/O technologies.
Arasan’s IP supports all timings and access methods (PC card memory, I/O and true IDE) specified in the CF+ standard. In addition it performs ECC generation and checking for xD. A host can access and configure this IP using the standard AHB bus interface. The CF/CF+ Interface block in IP handles memory, I/O, true IDE transfers based
on instructions from the host. It gets the timing information from the Timing Controller block and uses this timing information to perform the data transfer. The xD Interface block handles all the command, address, data sequences to manage the xD hardware protocols. Multi-block writes and erase accesses are supported to further improve performance. The host processor controls the configuration and operation of the controller through the AHB slave interface. Typical configuration settings includes timing modes, transaction types and data transfer modes.
Diagram
Features
- Memory Card Formats: CF+ 4.1, xD 1.2
- Supports two slots
CF+ – Compact Flash
- Memory: 8, 16 bit data mode
- I/O: 8, 16 bit data mode
- TrueIDE: 16 bit data mode
xD – Extreme Digital
- Async: 8 bit data mode
- I/O: 8 bit data mode
- Built-in support for slave DMA
Benefits
- Fully compliant core with proven silicon
- Premier direct support from Arasan IP core designers
- Easy-to-use industry standard test environment
- Unencrypted source code allows easy implementation
- Customer training available
- Reuse Methodology Manual guidelines (RMM) compliant Verilog code ensured using Spyglass
Deliverables
- RMM-compliant synthesizable RTL design in Verilog
- Easy-to-use test environment
- Synthesis scripts
- Technical documents
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