CompactFlash (CF) Device Controller IP
CompactFlash is used in a wide variety of applications ranging from data storage cards, magnetic disk drives, fax modem cards, and wireless pager cards. The CF cards support only common memory data storage whereas the CF+ cards expand to include I/O devices such as Ethernet cards. CompactFlash adopts the PC card (or PCMCIA 2.0) specification and therefore compatible with the PCMCIA or PC card. A 50-pin CompactFlash device can be inserted into a 68-pin PCMCIA or PC card slot with an adapter. The Arasan CompactFlash Device Controller IP core supports the CF and CF+ functionalities with a selection of host interfaces including AHB, APB, PCI, 8051, and custom buses.
The Arasan CompactFlash Device Controller IP core has three basic modes of operation: (1) PC card ATA using I/O mode, (2) PC card ATA using memory mode, (3) PC card ATA using memory and true IDE modes. The 16-bit CF+ device controller implements the Card Information Structure (CIS), Attribute Memory control, and Status registers that handle data transfers to/from the host interface. The Function I/O registers hold device function specific information that supports communication between the CF/CF+ host and CF/CF+ based I/O applications. The bridge controller also implements a flexible scatter-gather DMA for data transfer between the internal FIFOs and application memory with the host master capability. The CF/CF+ device controller is also capable of interfacing up to four endpoints in an application.
The Arasan CF/CF+ Device Controller IP has a host interface on the application side. The host interface supports both master and slave operations. The slave interface is used by external processor to program the I/O registers for configuring the CF/CF+ device controller, and for programing the control of data transfer between the device controller and application’s memory. The master interface is used to transfer packets between the internal FIFOs and application memory.
Diagram
Features
- Meets CF+ or CompactFlash specification revision 4.1
- Supports PC card ATA using memory mode
- Supports PC card ATA using I/O mode
- Supports PC card ATA using memory and true IDE modes
- Supports PCMCIA version 2.0
- Programmable through standard host interface
- Scatter-gather DMA mode
- Interface up to four endpoints for data transfer
- Supports Advanced Timing modes for I/O, common memory and true IDE mode access
- Dual clock architecture allows independent CF interface clock and host clock
- Power management support by monitoring
- CF/CF+ interface activity
- Optional AHB / APB host interface
- Optional PCI host interface
- Optional 8051 interface
- Optional custom host interface
Benefits
- Fully compliant core with proven silicon
- Premier direct support from Arasan IP core designers
- Easy-to-use industry standard test environment
- Unencrypted source code allows easy implementation
- Customer training available
- Reuse Methodology Manual guidelines (RMM) compliant Verilog code ensured using Spyglass
Deliverables
- RMM-compliant synthesizable RTL design in Verilog
- Easy-to-use test environment
- Synthesis scripts
- Technical documents
