SAN JOSE, Calif., Dec. 16, 2008 (GLOBE NEWSWIRE) — Arasan Chip Systems, Inc., "Arasan" a leader in Intellectual Property (IP) solutions – IP cores, Verification IP (VIP), Software Drivers and Stacks and Hardware Solutions, announced the immediate availability of the silicon-proven Mobile Industry Processor Interface (MIPI(sm)) D-PHY IP, for use with Display Serial Interface (DSI), Camera Serial Interface (CSI), and UniPro(sm) protocol. As a leading provider of mobile IP, Arasan continues to strengthen its strategic mobile initiative by expanding the MIPI IP portfolio with physical analog IP, therefore enabling a complete and comprehensive MIPI solution.
Arasan is the first and only IP provider to provide a complete end-to-end solution – from the digital controller to the analog PHY. The Arasan D-PHY is a complete serial communications cell optimized for implementing the physical layer of the MIPI DSI, CSI and UniPro protocol. It addresses the low power consumption, small form factor, and multi-function design challenges of the mobile device market. The Arasan D-PHY IP substantially exceeds the MIPI electrical and performance specification, achieving over 1 Gbps transfer speeds per lane, thus delivering a robust design without sacrificing performance. This meets the demands for both increased bandwidth and narrower links in camera, display and interconnect in mobile applications. It allows designers to optimize performance and power while maintaining interoperability between devices.
"The MIPI D-PHY is not a trivial development and requires significant testing to ensure conformance and interoperability" said Andy Baldman, MIPI Manager at UNH-IOL. "We appreciate working with Arasan Chip Systems to collaborate on the testing of their MIPI D-PHY. Collaboration of this type will ensure the high quality and performance needed in the mobile industry."
The modularly architected design implemented by Arasan provides customers with a unique flexibility to integrate the optimal PHY architecture required for their System-on-Chip (SoC) – universal, transmitter or receiver configuration. The IP relies exclusively on a standard CMOS process technology and does not require any special process options, which results in significant manufacturing cost reduction and ease of integration into a SoC.
"Contrary to recent industry announcements, Arasan has silicon proven D-PHYs and is working closely with customers on further implementations. We are the only IP Company to provide designers with a complete and comprehensive solution, from the digital controller to the physical layer." said Prakash Kamath, VP of Engineering at Arasan. "Our 'Total IP Solution' addresses the resounding requests from our customers for a complete solution, thereby providing customers confidence that the PHY is fully interoperable with the other MIPI protocols."
Accessing all the IP from one provider allows designers to lower the risk and cost of integrating the MIPI interfaces into their high-performance SoC designs. The D-PHY IP implementation will reduce pin count, power consumption and system costs while improving interoperability for next generation mobile devices. In addition to mobile phones, the Arasan IP cores provide a "Total IP Solution" for portable applications such as laptop cameras, mobile internet devices and gaming platforms.
