Overview The Arasan I3C Device Controller IP Implements Device Controller functionality as defined by the MIPI Alliance’s I3C Specification. The I3C bus is used for various sensors in the mobile/automotive system where an I3C Host Controller transfers data and control information between itself and various sensor devices. The I3C Device Controller IP can be easily integrated into the Sensor/Device Controllers with minimal gate count.
The I3C Device Controller is highly configurable (synthesis time) to provide an optimal solution based on the Device’s requirements. This includes, acting as a legacy I2C device, Support for Dynamic Address Assignment, HDR, and a configurable FIFO for data transfers.
Arasan has participated in multiple MIPI I3C Interop Workshops to ensure compliance of its I3C Host IP, I3C Device IP, I3C Software and HDK.
Block Diagram
Features
• Compliant with MIPI I3C Specification Rev 1.1.1 • Supports up to 12.5 MHz operation using Push-Pull • Open-Drain and Push-pull type transactions (as required) • Acts as a legacy I2C Device Controller while supporting legacy I2C Messaging and protocol • Supported features,
Dynamic address assignment
Address arbitration
In-band Interrupt
Hot Join request handling
HDR Capable – HDR-DDR
CCC Command features
Private read and write transfers
Data transfer with and without broadcast
Legacy I2C support
Timing Control
Group addressing
Target reset handling
JESD403-1 Sideband interface
APB Target Interface for Configuring and Controlling the IP with interrupt and for data transfers, IBI
Deliverables
• RMM compliant synthesizable RTL design in Verilog • Easy-to-use test environment • Synthesis scripts • Technical documents • Validated with 3rd Party UVM-based Device Controller VIP and available as an additional option
