USB 2.0 Hub

USB 2.0 Hub IP Core

The Arasan USB 2.0 Hub IP core is an USB 2.0 specification compliant hub core that supports 480 Mbit/s in High Speed (HS) mode, 12 Mbit/s in Full Speed (FS) mode, and 1.5 Mbit/s in Low Speed (LS) mode. The Arasan USB 2.0 Hub IP core consists of the Hub Controller, Hub Repeater, Transaction Translators, Routing Logic, and Downstream Ports.

The USB 2.0 Hub Controller controls the operation of the USB hub by interpreting both the USB commands and Hub class specific commands. High-speed packets originating from the root hub are forwarded by the Hub Repeater to the HS Downstream Ports through the Routing Logic. Full-speed and low-speed packets scheduled by the host system software as split transactions are forwarded to the Transaction Translators. The Transaction Translators handle split transactions that convey isochronous, interrupt, control, and bulk transfers across the high-speed bus to and from the full-speed and low-speed devices that attached to the hub. The Transaction Translators also perform CRC on incoming packets from the Hub Repeater or Routing Logic. The Routing Logic connects the Hub Repeater to the Downstream Ports in a high-speed transfer, and it connects the Transaction Translators to the Downstream Ports in a full-speed or low-speed transfer. The number of Downstream Ports is scalable.

The Arasan Auto-configure and Auto-wire are pre-compiled C language utilities that allow users to have the freedom to fully customize their designs.

Diagram

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